On-chip network design method for distributed parallel operation algorithm

Abstract

The present disclosure relates to an on-chip network design method for a distributed parallel operation algorithm. According to a distributed parallel operation algorithm of an on-chip network, the on-chip network is divided into two layers, including a unicast network and a multicast network, where the unicast network is configured to implement point-to-point propagation between nodes and transmit independent operation data required by operation nodes to each operation node in a form of unicast; and the multicast network is a customized multicast network for the distributed parallel operation algorithm and configured to transmit common operation data to all the operation nodes, such that a data packet in the network is efficiently transmitted through a combination of the unicast network and the multicast network. By designing a multicast tree transmission architecture for the distributed parallel operation algorithm, a bidirectional replication node or a receiving node is disposed in each operation node.

Dependencies are inferred from the claim text.