Space Optimization Between SRAM Cells and Standard Cells

A structure comprising:

• a Static Random Access Memory (SRAM) cell having a first length and a first height;
• a first filler cell having a second length equal to the first length, and a second height equal to the first height, wherein the first filler cell comprises a first plurality of semiconductor fins, each extending from a first boundary to a second boundary of the first filler cell;
• and
• a standard cell, with the first filler cell being between the SRAM cell and the standard cell.

A structure comprising:

• a standard cell region, with a rectangular space being located within the standard cell region, wherein the standard cell region comprises:
• a top row of standard cells, wherein the top row comprises a first bottom boundary facing the rectangular space;
• and
• a plurality of rows of standard cells separated as a first part and a second part, wherein the first part and the second part are located on opposing sides of the rectangular space, and wherein side boundaries of the first part and the second part face the rectangular space;
• a memory array in the rectangular space, wherein second bottom boundaries of the first part and the second part and a third bottom boundary of the memory array are aligned to a same straight line;
• and
• a filler cell region in the rectangular space, wherein the filler cell region comprises a plurality of filler cells forming an additional row, and wherein the filler cell region comprises:
• a first top boundary contacting the first bottom boundary of the top row of standard cells;
• and
• a fourth bottom boundary contacting a second top boundary of the memory array.