Selectable register file blocks for hardware threads of a multithreaded processor

(canceled)

A multithreaded processor comprising:

• a register file that provides registers for T hardware threads, the register file being organized as a set of B blocks, where each B block contains N registers and where B is greater than or equal to T,
• wherein each of the T hardware threads is assigned at least one of the B blocks of the register file and not more than R/N of the B blocks of the register file, where R is a quantity of registers defined by an instruction set architecture of the multithreaded processor and where R/N is an integer, thereby the multithreaded processor supports the T hardware threads with the register file that has less than T×R registers, and
• wherein at least some of the B blocks of the register file are preconfigured to be assigned to some of the T hardware threads when a processor register-transfer level (RTL) design is generated such that assignments of at least some of the B blocks of the register file to some of the T hardware threads are fixed.

(canceled)

A multithreaded processor comprising:

• a register file that provides registers for T hardware threads, the register file being organized as a set of B blocks, where each B block contains N registers and where B is greater than or equal to T;
• and
• a block assigning circuitry configured to assign each of the T hardware threads at least one of the B blocks of the register file and not more than R/N of the B blocks of the register file, where R is a quantity of registers defined by an instruction set architecture of the multithreaded processor and where R/N is an integer, thereby the multithreaded processor supports the T hardware threads with the register file that has less than T×R registers, wherein at least some of the B blocks of the register file are preconfigured to be assigned to some of the T hardware threads when a processor register-transfer level (RTL) design is generated such that assignments of at least some of the B blocks of the register file to some of the T hardware threads are fixed and wherein the blocks assigning circuitry is configured to assign the B blocks of the register file that have not been preconfigured using software-controlled data in a control/status processor.

(canceled)