Methods for controlling asynchronous FIFO memory and data transmission system utilizing the same
AssigneeRealtek Semiconductor Corp.
InventorsYUEFENG CHEN, HUI GU
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AssigneeRealtek Semiconductor Corp.
InventorsYUEFENG CHEN, HUI GU
Estimating the term…
A method for controlling operations of an asynchronous FIFO memory includes: determining a current depth of the asynchronous FIFO memory according to at least one of a clock ratio, a burst length and a continuous transmission length, where the clock ratio is a ratio of a frequency of a first clock signal used by a master device to a frequency of a second clock signal used by a slave device; configuring one or more entries of the asynchronous FIFO memory to be used according to the current depth; and controlling a plurality of FIFO clock signals provided to the asynchronous FIFO memory according to the current depth. One FIFO clock signal corresponds to one entry, and one or more FIFO clock signals corresponding to one or more entries that are not configured according to the current depth are disabled.
A method for controlling operations of an asynchronous FIFO memory, wherein the asynchronous FIFO memory is coupled between a master device and a slave device for buffering data written by the master device, the method comprising:
A data transmission system, comprising:
Dependencies are inferred from the claim text.