Memory array structure with contact enhancement sidewall spacers

Abstract

The present disclosure provides a dynamic random access memory (DRAM) array with contact enhancement sidewall spacers. The memory array structure includes a semiconductor substrate, an isolation structure and contact enhancement sidewall spacers. The semiconductor substrate has a trench defining laterally separate active areas formed of surface regions of the semiconductor substrate. Top surfaces of a first group of the active areas are recessed with respect to top surfaces of a second group of the active areas. The isolation structure is filled in the trench and in lateral contact with bottom portions of the active areas. The contact enhancement sidewall spacers laterally surround top portions of the active areas, respectively.

Dependencies are inferred from the claim text.