Transistor source/drain contacts and methods of forming the same

A method comprising:

• forming a source/drain region adjacent a gate structure;
• depositing a contact etch stop layer (CESL) on the source/drain region;
• forming a contact opening through the CESL, the contact opening exposing the source/drain region and a sidewall of the CESL;
• forming a silicide region on the source/drain region;
• conformally depositing a conductive material over the gate structure, on the silicide region, and on the sidewall of the CESL;
• performing a first etching process on the conductive material to expose the sidewall of the CESL, wherein conductive material remains on the silicide region after the first etching process;
• conformally depositing an isolation material on the conductive material and on the exposed sidewall of the CESL;
• performing a second etching process on the isolation material to expose the conductive material, wherein isolation material remains on the CESL after the second etching process;
• and
• after the second etching process, filling the contact opening with the conductive material.

A device comprising:

• a gate structure on a channel region of a substrate;
• a gate mask on the gate structure;
• a source/drain region adjoining the channel region;
• a source/drain contact connected to the source/drain region, comprising:
• a lower contact region overlying the source/drain region;
• and
• an upper contact region on the lower contact region;
• and
• a contact spacer around the upper contact region, wherein the contact spacer is over the lower contact region.