Heterogenous Integration Scheme for III-V/Si and Si CMOS Integrated Circuits
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsChan-Hong Chern, Yi-An Lai
Life of this patent
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Abstract
A method includes bonding a III-V die directly to a Complementary Metal-Oxide-Semiconductor (CMOS) die to form a die stack. The III-V die includes a (111) semiconductor substrate, and a first circuit including a III-V based n-type transistor formed at a surface of the (111) semiconductor substrate. The CMOS die includes a (100) semiconductor substrate, and a second circuit including an n-type transistor and a p-type transistor on the (100) semiconductor substrate. The first circuit is electrically connected to the second circuit.
Claims20
A method comprising:
- bonding a III-V die directly to a Complementary Metal-Oxide-Semiconductor (CMOS) die to form a die stack, wherein the III-V die comprises:
- a (111) semiconductor substrate;
- and
- a first circuit comprising:
- a III-V based n-type transistor formed at a surface of the (111) semiconductor substrate, and wherein the CMOS die comprises:
- a (100) semiconductor substrate;
- a second circuit comprising:
- an n-type transistor on the (100) semiconductor substrate;
- and
- a p-type transistor on the (100) semiconductor substrate, wherein the first circuit is electrically connected to the second circuit.
A package comprising:
- a III-V die comprising:
- a (111) semiconductor substrate;
- and
- a III-V based n-type transistor at a surface of the (111) semiconductor substrate;
- and
- a Complementary Metal-Oxide-Semiconductor (CMOS) die physically bonding to the III-V die, the CMOS die comprising:
- a (100) semiconductor substrate;
- an n-type transistor on the (100) semiconductor substrate;
- and
- a p-type transistor on the (100) semiconductor substrate.
A package comprising:
- a III-V die comprising:
- a (111) semiconductor substrate;
- a III-V based n-type transistor formed at a surface of the (111) semiconductor substrate;
- and
- a first electrical connector connected to the III-V based n-type transistor;
- and
- a Complementary Metal-Oxide-Semiconductor (CMOS) die over directly bonding to the III-V die, the CMOS die comprising:
- a (100) semiconductor substrate;
- a p-type transistor at a surface of the (100) semiconductor substrate;
- and
- a second electrical connector connecting to the p-type transistor, wherein the first electrical connector and the second electrical connector interconnect the III-V based n-type transistor and the p-type transistor.
Dependencies are inferred from the claim text.