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US 2023/0154800 A1Published application
Method and Structure for FinFET Isolation
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsChe-Cheng Chang, Chih-Han Lin, Jr-Jung Lin
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Abstract
A semiconductor device includes a substrate, a fin protruding from the substrate, and a gate stack over the substrate and engaging the fin. The fin having a first end and a second end. The semiconductor device also includes a dielectric layer abutting the first end of the fin and spacer features disposed on sidewalls of the gate stack and on a top surface of the dielectric layer.
Claims20
A semiconductor device, comprising:
- a substrate;
- a fin protruding from the substrate, the fin having a first end and a second end;
- a gate stack over the substrate and engaging the fin;
- a dielectric layer abutting the first end of the fin;
- and
- spacer features disposed on sidewalls of the gate stack and on a top surface of the dielectric layer.
3 more elements
A semiconductor device, comprising:
- a substrate;
- a fin protruding from the substrate, the fin having a first end and a second end;
- a first isolation structure disposed on a sidewall and a top surface of the first end;
- a second isolation structure disposed on a sidewall but not on a top surface of the second end;
- and
- a dielectric feature disposed on the top surface of the second end.
3 more elements
A semiconductor device, comprising:
- a substrate;
- a first dielectric layer over the substrate;
- a fin protruding from the substrate and through the first dielectric layer, the fin having a first end and a second end;
- a second dielectric layer abutting the first end of the fin;
- a third dielectric layer abutting the second end of the fin;
- and
- a fourth dielectric layer abutting the third dielectric layer, wherein the third dielectric layer is disposed between a lower portion of the fourth dielectric layer and the second end of the fin.
4 more elements
Dependencies are inferred from the claim text.