US 2023/0147226 A1Published application

Size setting method for power switch transistor and system thereof

AssigneeIntegrated Silicon Solution, Inc.

InventorShuenrun Seara JIAN

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Abstract

A size setting method for a power switch transistor and a system thereof are proposed. A load current extracting step is performed to extract a first load current and a second load current. A limited voltage drop calculating step is performed to calculate a limited voltage drop according to a speed proportional value, the first load current and the second load current. A standard supply current calculating step is performed to calculate a standard supply current according to the limited voltage drop. A simulated supply current calculating step is performed to calculate a simulated supply current according to the standard supply current, the limited voltage drop and a line voltage value. A size setting step is performed to compare the first load current with the simulated supply current to calculate a size parameter, and set a size of the power switch transistor according to the size parameter.

Claims16

Dependent claims

A size setting method for at least one power switch transistor, comprising:

performing a first load current extracting step to drive a processing unit to extract a first load current of a first logic circuit, wherein the first logic circuit is connected to a power supply voltage via the at least one power switch transistor and at least one power line to generate the first load current, and the at least one power line has at least one line voltage;
performing a second load current extracting step to drive the processing unit to extract a second load current of a second logic circuit, wherein the second logic circuit is connected to the power supply voltage to generate the second load current;
performing a limited voltage drop calculating step to drive the processing unit to set a speed proportional value and store the speed proportional value to a storage unit, wherein the processing unit performs a voltage calculating procedure on the speed proportional value, the first load current and the second load current to calculate a limited voltage drop between the at least one power switch transistor and the first logic circuit;
performing a standard supply current calculating step to drive the processing unit to calculate a standard supply current of the at least one power switch transistor according to the limited voltage drop;
performing a simulated supply current calculating step to drive the processing unit to perform a current calculating procedure on the standard supply current, the limited voltage drop and the at least one line voltage to calculate a simulated supply current of the at least one power switch transistor;
and
performing a size setting step to drive the processing unit to compare the first load current with the simulated supply current to calculate a size parameter, and then set a size of the at least one power switch transistor according to the size parameter.

4 more elements

A size setting system for at least one power switch transistor, comprising:

a power supply voltage;
the at least one power switch transistor connected to the power supply voltage;
at least one power line connected to the at least one power switch transistor and having at least one line voltage;
a first logic circuit connected to the at least one power line and generating a first load current;
a second logic circuit connected to the power supply voltage and generating a second load current;
a storage unit configured to access the at least one line voltage, a voltage calculating procedure and a current calculating procedure;
and
a processing unit signally connected to the storage unit, wherein the processing unit is configured to implement a size setting method for the at least one power switch transistor comprising:
performing a first load current extracting step to extract the first load current;
performing a second load current extracting step to extract the second load current;
performing a limited voltage drop calculating step to set a speed proportional value and store the speed proportional value to the storage unit, and then perform the voltage calculating procedure on the speed proportional value, the first load current and the second load current to calculate a limited voltage drop between the at least one power switch transistor and the first logic circuit;
performing a standard supply current calculating step to calculate a standard supply current of the at least one power switch transistor according to the limited voltage drop;
performing a simulated supply current calculating step to perform the current calculating procedure on the standard supply current, the limited voltage drop and the at least one line voltage to calculate a simulated supply current of the at least one power switch transistor;
and
performing a size setting step to compare the first load current with the simulated supply current to calculate a size parameter, and then set a size of the at least one power switch transistor according to the size parameter.

12 more elements

Dependencies are inferred from the claim text.