Layer transfer process to form backside contacts in semiconductor devices

An electronic device, comprising:

• a chip package comprising one or more dies, at least one of the one or more dies comprising
• a semiconductor device including
• a semiconductor material extending between a source region and a drain region, and
• a sub fin beneath the semiconductor material;
• a first dielectric layer adjacent to the sub fin of the semiconductor device;
• and
• a conductive contact in contact with the source region or the drain region from beneath the source region or the drain region;
• wherein the sub fin includes a semiconductor layer over a second dielectric layer.

An integrated circuit comprising:

• a first semiconductor device including
• a first semiconductor material extending between a first source region and a first drain region,
• a sub fin beneath the first semiconductor material and including a semiconductor layer over a dielectric layer, and
• a first gate structure around the first semiconductor material;
• a second semiconductor device located vertically over the first semiconductor device and including
• a second semiconductor material extending between a second source region and a second drain region, and
• a second gate structure around the second semiconductor material;
• a gate isolation layer between the first gate structure and the second gate structure;
• a first conductive contact in contact with the first source region or the first drain region from beneath the first source region or the first drain region;
• and
• a second conductive contact in contact with the second source region or the second drain region from above the second source region or the second drain region.