US 2023/0145187 A1 · INTEGRATED CIRCUIT DEVICE AND ELECTRONIC DEVICE INCLUDING THE SAME

Abstract

An integrated circuit device includes a substrate, and a unit cell on the substrate. The unit cell defines a unit cell area including at least two discrete devices. The unit cell includes a routing layer configured to route a signal and a voltage to the at least two discrete devices, the routing layer including a signal line and a voltage line extending in a first direction, and the signal line and the voltage line spaced apart from each other in a second direction, and a metal line stack including metal lines stacked between the unit cell area and the routing layer in the first direction. A plurality of contact vias are each configured to connect at least two adjacent ones of the signal line, the voltage line, the metal lines and the at least two discrete devices, in a third direction.

Claims20

Dependent claims

An integrated circuit device comprising:

a substrate;
and
a unit cell on the substrate,
wherein the unit cell includes:
a unit cell area including at least two discrete devices;
a routing layer configured to route a signal and a voltage to the at least two discrete devices, the routing layer including a signal line and a voltage line extending in a first direction, and the signal line and the voltage line spaced apart from each other in a second direction,
a metal line stack including metal lines stacked between the unit cell area and the routing layer in the first direction;
and
a plurality of contact vias each configured to connect two adjacent ones of the signal line, the voltage line, the metal lines and the at least two discrete devices, in a third direction.

6 more elements

An integrated circuit device comprising a unit inverter, wherein the unit inverter includes:

an NMOS transistor and a PMOS transistor in a unit cell area of a substrate;
an input signal line, an output signal line, a power voltage line, and a ground voltage line extending in a first direction and configured to route an input signal, an output signal, a power voltage, and a ground voltage to the NMOS transistor and the PMOS transistor;
and
a metal line stack including metal lines extending in the first direction and stacked one above another, wherein the metal lines include at least one separate metal line corresponding to each of the input signal line, the output signal line, the power voltage line, and the ground voltage line, and wherein the metal lines connect the NMOS transistor and the PMOS transistor with corresponding ones of the input signal line, the output signal line, the power voltage line, and the ground voltage line through contact vias.

1 more element

Dependencies are inferred from the claim text.

Integrated circuit device and electronic device including the same

Life of this patent

Integrated circuit device and electronic device including the same

Life of this patent

Abstract

Claims20