US 2023/0143926 A1 · Dynamic Controller Buffer Management and Configuration

Abstract

A method and apparatus for dynamic controller buffer management is disclosed. According to certain embodiments, responsive to commands received from a host, a controller may adjust one or more partitions of a controller buffer memory to adjust the size of different types of buffer memory. In some embodiments, preset buffer memory configurations may be applied to the buffer memory to adjust buffer memory allocation based on the current workload. By way of example, when sequential reads are detected, a TRAM buffer size may be increased to provide additional RLA buffers, at the expense of XRAM and/or L2P buffer size. Where operations involving SLC memory is detected, allocation of buffer memory parity buffers of XRAM may be decreased, to provide additional buffer space to L2P.

Claims20

Dependent claims

A data storage device, comprising:

a non-volatile memory (NVM) device;
and
a controller coupled to the NVM device, the controller comprising:
a buffer memory device comprising a first buffer partition, the first buffer partition being of a first buffer size, and a second buffer partition that is different from the first buffer partition, the of a second buffer partition being of a second buffer size;
and
a processor coupled to the buffer memory device, the processor configured to:
identify a workload characteristic of a workload of the data storage device;
modify the first buffer size based on the workload characteristic;
and
modify the second buffer size based on the modification of the first buffer size.

7 more elements

Dependencies are inferred from the claim text.

Dynamic Controller Buffer Management and Configuration

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Dynamic Controller Buffer Management and Configuration

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Abstract

Claims20