US 2023/0142924 A1 · 3D NAND MEMORY DEVICE AND FORMING METHOD THEREOF

Abstract

A method for forming a 3D NAND memory device is provided. The method includes: providing a semiconductor structure including a semiconductor substrate, a stacked structure, and a dielectric layer covering the semiconductor substrate and the stacked structure; forming, in the dielectric layer and the stacked structure, channel through vias penetrating through the stacked structure; forming a channel structure in each channel through via, and sequentially forming a polysilicon layer, a first metal silicide layer located on the polysilicon layer, and a through via contact metal layer located on the first metal silicide layer in the channel structure; forming a first through via in the dielectric layer for exposing the semiconductor substrate after forming the first metal silicide layer; forming a second metal silicide layer at a bottom of the first through via; and forming a first contact plug connected to the second metal silicide layer in the first through via.

Claims20

Dependent claims

A method for forming a 3D NAND memory device, comprising:

providing a semiconductor structure, wherein the semiconductor structure comprises a semiconductor substrate, a stacked structure on the semiconductor substrate, and a dielectric layer covering the semiconductor substrate and the stacked structure;
forming, in the dielectric layer and the stacked structure, channel through vias penetrating through the stacked structure;
forming a channel structure in each channel through via, and sequentially forming a polysilicon layer, a first metal silicide layer located on the polysilicon layer, and a through via contact metal layer located on the first metal silicide layer in the channel structure,
forming a first through via in the dielectric layer for exposing the semiconductor substrate after forming the first metal silicide layer;
forming a second metal silicide layer at a bottom of the first through via;
and
forming a first contact plug connected to the second metal silicide layer in the first through via.

4 more elements

Dependencies are inferred from the claim text.

3d nand memory device and forming method thereof

Life of this patent

3d nand memory device and forming method thereof

Life of this patent

Abstract

Claims20