High resistance poly resistor

A method of forming an integrated circuit, comprising:

• forming a plurality of segments of a polysilicon resistor, including first, second and third segments, the second segment located between and running about parallel to the first and third segments;
• forming a first header that connects the first and second segments, and a second header that connects the second and third segments;
• forming a first metal silicide layer located over the first header and extending over the first and second segments toward the second header;
• forming a second metal silicide layer located over the second header and extending over the second and third segments toward the first header;
• and
• forming a dielectric layer located over and in contact with the first, second and third segments between the first and second metal silicide layers.

An integrated circuit, comprising:

• first and second polysilicon terminals over a semiconductor substrate;
• a polysilicon line having first and second ends and being connected between the first and second terminals;
• a dielectric layer located over and in contact with the polysilicon line, the dielectric layer extending uninterrupted along a long axis of the polysilicon line from a first location on the line to a second location on the line;
• first and second metal silicide layers located over and in contact with the polysilicon line, the first metal silicide layer extending uninterrupted from the first end of the polysilicon line to the first location on the line, and the second metal silicide layer extending uninterrupted from the second end of the polysilicon line to the second location on the line.

An integrated circuit, comprising:

• a plurality of segments of a polysilicon resistor, including first and second segments separated by a spacing distance;
• a header connected to at least the first segment;
• a first terminal connected to the first segment and a second terminal connected to the second segment;
• and
• a dummy segment connected to the first terminal, the dummy segment spaced from the first segment by the spacing distance.