US 2023/0141681 A1 · CMOS IMAGE SENSORS AND MANUFACTURING METHODS THEREOF

Abstract

Various embodiments of the present disclosure are directed towards an integrated circuit on a semiconductor substrate. First and second gate electrode structures are disposed over the substrate and are spaced laterally from one another. A common source/drain region is disposed in the semiconductor substrate between the first and second gate electrode structures. An insulator layer overlies the first and second gate electrode structures. A source/drain contact extends through the insulator layer between the first and second gate electrode structures to contact the common source/drain region. First and second sidewall spacer structures are disposed along outer sidewalls of the first and second gate electrode structures, respectively, and have first and second outer sidewalls, respectively, adjacent to the source/drain contact. The first outer sidewall includes at least two indentations facing a first side of the source/drain contact, and the second outer sidewall includes at least two indentations facing a second side of the source/drain contact.

Claims20

Dependent claims

An integrated circuit, comprising:

a semiconductor substrate;
first and second gate electrode structures disposed over the semiconductor substrate and spaced apart laterally from one another;
a common source/drain region disposed in the semiconductor substrate between the first and second gate electrode structures;
an insulator layer overlying the first and second gate electrode structures;
a source/drain contact extending through the insulator layer between the first and second gate electrode structures to contact the common source/drain region;
and
first and second sidewall spacer structures disposed along outer sidewalls of the first and second gate electrode structures, respectively, and having first and second outer sidewalls, respectively, adjacent to the source/drain contact;
and
wherein the first outer sidewall includes at least two indentations along the first outer sidewall facing a first side of the source/drain contact and wherein the second outer sidewall includes at least two indentations along the second outer sidewall facing a second side of the source/drain contact.

6 more elements

A image sensor, comprising:

an image sensor substrate;
a photodetector disposed within the image sensor substrate;
and
a pixel device disposed on or within the image sensor substrate and configured to selectively detect charge from the photodetector, the pixel device comprising a gate electrode structure disposed over the image sensor substrate, a source/drain (S/D) region disposed within the image sensor substrate, and a sidewall spacer structure on an outer sidewall of the gate electrode structure, wherein the sidewall spacer structure includes at least three indentations along a cross-sectional outer surface of the outer sidewall.

1 more element

A method comprising:

forming a gate electrode structure over a semiconductor substrate;
forming a first conformal layer over an upper surface of the gate electrode structure and along sidewalls of the gate electrode structure;
forming a second conformal layer over an upper surface of the first conformal layer and along an outer sidewall of the first conformal layer;
performing a first etch that vertically etches back the second conformal layer to remove lateral portions of the second conformal layer, thereby leaving a nitride sidewall spacer on a ledge along the outer sidewall of the first conformal layer;
performing a second etch that laterally etches back the first conformal layer to leave at least one indentation in the outer sidewall of the first conformal layer where an uppermost tip of the nitride sidewall spacer meets the first conformal layer;
carrying out an ion implantation with the first conformal layer along the outer sidewall of the gate electrode structure and the nitride sidewall spacer in place on the ledge, thereby forming a source/drain region in the semiconductor substrate;
and
after the ion implantation, performing a third etch that at least partially removes the nitride sidewall spacer.

5 more elements

Dependencies are inferred from the claim text.

Cmos image sensors and manufacturing methods thereof

Life of this patent

Cmos image sensors and manufacturing methods thereof

Life of this patent

Abstract

Claims20