In-memory computing with cache coherent protocol

A system for computing, the system comprising:

• a memory;
• and
• a cache coherent protocol interface circuit having a first interface and a second interface,
• the cache coherent protocol interface circuit being configured to perform an arithmetic operation on data stored in the memory,
• the first interface of the cache coherent protocol interface circuit being connected to the memory, and
• the second interface being configured as a cache coherent protocol interface on a bus interface.

A method for computing, the method comprising:

• sending, by a host processing circuit, to a CXL interface circuit, one or more CXL packets;
• sending, by the CXL interface circuit, in response to receiving the CXL packets, to a function-in-memory circuit in a memory connected to the CXL interface circuit, an instruction;
• and
• performing, by the function-in-memory circuit, an operation, in accordance with the instruction, on operands including a first operand retrieved from the memory, to form a result.