Semiconductor device and method of fabricating the same

A semiconductor device, comprising:

• a semiconductor substrate;
• an interconnection layer disposed on the semiconductor substrate;
• a first passivation layer disposed on the interconnection layer;
• a plurality of conductive pads disposed on the first passivation layer and electrically connected to the interconnection layer;
• at least one inductor pattern electrically connected to the interconnection layer, wherein the at least one inductor pattern comprises:
• a first terminal disposed on the first passivation layer and electrically connected to the interconnection layer;
• a first conductive line joined with the first terminal, wherein a width of the first conductive line is d1 and a width of the first terminal is d2;
• a second terminal disposed on the first passivation layer and electrically connected to the interconnection layer;
• a second conductive line joined with the second terminal, wherein a width of the second conductive line is d3 and a width of the second terminal is d4, and the width d4 is greater than the widths d1, d2 and d3;
• and
• a plurality of conductive coils disposed on the first passivation layer and joining the first conductive line to the second conductive line;
• a second passivation layer disposed on the plurality of conductive pads and the at least one inductor pattern;
• and
• a plurality of conductive posts disposed on the second passivation layer and electrically connected to the plurality of conductive pads.

A method of fabricating a semiconductor device, comprising:

• providing a semiconductor substrate;
• forming an interconnection layer on the semiconductor substrate;
• forming a first passivation layer on the interconnection layer, and patterning the first passivation layer to form a plurality of first openings;
• forming a conductive layer on the first passivation layer, wherein the conductive layer is electrically connected to the interconnection layer through the plurality of first openings;
• patterning the conductive layer to form a plurality of conductive pads and at least one inductor pattern, wherein the at least one inductor pattern comprises:
• a first conductive line joined with a first terminal;
• a second conductive line joined with a second terminal;
• and
• a plurality of conductive coils joining the first conductive line to the second conductive line, wherein the plurality of conductive coils comprises an outer coil joined with the first conductive line, an inner coil joined with the second conductive line and the outer coil, and wherein the second conductive line is spaced apart from a first side of the inner coil in a first direction by distance Y, the distance Y is equal to a spacing of loops of the plurality of conductive coils, the second terminal is spaced apart from a second side of the inner coil in a second direction by distance X1, and a relationship of the distance X1 to the distance Y satisfies:
• X1>1.25Y;
• forming a second passivation layer on the plurality of conductive pads and the at least one inductor pattern, and patterning the second passivation layer to form a plurality of second openings revealing the plurality of conductive pads;
• and
• forming a plurality of conductive posts in the plurality of second openings, wherein the plurality of conductive posts is electrically connected to the plurality of conductive pads through the plurality of second openings.