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US 2023/0069266 A1Published application
Saving and restoring registers
AssigneeArm Limited
InventorsBradley John SMITH, Thomas Christopher GROCUTT
Life of this patent
Estimating the term…
Abstract
There is provided a data processing apparatus comprising a plurality of registers, each of the registers having data bits to store data and metadata bits to store metadata. Each of the registers is adapted to operate in a metadata mode in which the metadata bits and the data bits are valid, and a data mode in which the data bits are valid and the metadata bits are invalid. Mode bit storage circuitry indicates whether each of the registers is in the data mode or the metadata mode. Execution circuitry is responsive to a memory operation that is a store operation on one or more given registers.
Claims20
A data processing apparatus comprising:
- a plurality of registers, each of the registers having data bits to store data, and metadata bits to store metadata, wherein each of the registers is adapted to operate in a metadata mode in which the metadata bits and the data bits are valid, and a data mode in which the data bits are valid and the metadata bits are invalid;
- mode bit storage circuitry adapted to indicate whether each of the registers is in the data mode or the metadata mode;
- and,
- execution circuitry, responsive to a memory operation that is a store operation on one or more given registers:
- to determine from the mode bit storage circuitry whether a register in the one or more given registers is in the data mode or the metadata mode;
- to store the data bits of the register and the metadata bits of the register to a data structure in memory when the register is in the metadata mode;
- and,
- to store the data bits of the register without the metadata bits of the register to the data structure in the memory when the register is in the data mode.
5 more elements
A data processing apparatus comprising:
- a plurality of registers, each of the registers having data bits to store data, and metadata bits to store metadata, wherein each of the registers is adapted to operate in a metadata mode in which the metadata bits and the data bits are valid, and a data mode in which the data bits are valid and the metadata bits are invalid;
- mode bit storage circuitry adapted to indicate whether each of the registers is in the data mode or the metadata mode;
- and,
- execution circuitry, responsive to a memory operation that is a load operation on one or more given elements of a data structure in a memory:
- to determine whether an element in the one or more given elements is of a data type or a combined type;
- to load the element into the data bits of one of the registers and to set the mode bit storage circuitry to indicate that the one of the registers is in the data mode when the element is of the data type;
- and,
- to load the element into the data bits and the metadata bits of one of the registers when the element is of the combined type.
5 more elements
The data processing apparatus according to claim 9, wherein the execution circuitry is configured to load the element into the one of the registers by:
- loading the data from the element into the data bits of one of the registers without loading into the metadata bits of the one of the registers, when the element is of the data type;
- and,
- loading the data and the metadata from the element into the one of the registers when the element is of the combined type.
A data processing method, comprising:
- indicating whether each of a plurality of registers is in a data mode or a metadata mode, wherein each of the registers has data bits to store data, and metadata bits to store metadata, and wherein when one of the registers operates in the metadata mode, the metadata bits and the data bits are valid, and when the one of the registers operates in the data mode, the data bits are valid and the metadata bits are invalid;
- responding to a memory operation that is a store operation by:
- determining from mode bit storage circuitry whether a register in the one or more given registers is in the data mode or the metadata mode;
- storing the data bits of the register and the metadata bits of the register to a data structure in memory when the register is in the metadata mode;
- and,
- storing the data bits of the register without the metadata bits of the register to the data structure in the memory when the register is in the data mode.
3 more elements
A data processing method, comprising:
- indicating, using mode bit storage circuitry, whether each of a plurality of registers is in a data mode or a metadata mode, wherein each of the registers has data bits to store data, and metadata bits to store metadata, and wherein when one of the registers operates in the metadata mode, the metadata bits and the data bits are valid, and when the one of the registers operates in the data mode, the data bits are valid and the metadata bits are invalid;
- responding to a memory operation that is a load operation by:
- determining whether an element in the one or more given elements is of a data type or a combined type;
- loading the element into the data bits of one of the registers and setting the mode bit storage circuitry to indicate that the one of the registers is in the data mode when the element is of the data type;
- and,
- loading the element into the data bits and the metadata bits of one of the registers when the element is of the combined type.
3 more elements
A computer program for controlling a host data processing apparatus to provide an instruction execution environment comprising:
- a plurality of register data structures, each of the register data structures having data bit data structures to store data, and metadata data structures to store metadata, wherein each of the register data structures is adapted to operate in a metadata mode in which the metadata bit data structures and the data bit data structures are valid, and a data mode in which the data bit data structures are valid and the metadata bit data structures are invalid;
- a mode bit data structure adapted to indicate whether each of the register data structures is in the data mode or the metadata mode;
- and,
- execution program logic, responsive to a memory operation that is a store operation on one or more given register data structures:
- to determine from the mode bit data structure whether a register data structure in the one or more given register data structures is in the data mode or the metadata modes;
- to store the data bit data structures of the register data structure and the metadata bit data structures of the register data structures to a memory data structure when the register data structure is in the metadata mode;
- and,
- to store the data bit data structures of the register data structure without the metadata bit data structures of the register data structures to the memory data structure when the register is in the data mode.
5 more elements
A computer program for controlling a host data processing apparatus to provide an instruction execution environment comprising:
- a plurality of register data structures, each of the register data structures having data bit data structures to store data, and metadata data structures to store metadata, wherein each of the register data structures is adapted to operate in a metadata mode in which the metadata bit data structures and the data bit data structures are valid, and a data mode in which the data bit data structures are valid and the metadata bit data structures are invalid;
- a mode bit data structure adapted to indicate whether each of the register data structures is in the data mode or the metadata mode;
- and,
- execution program logic, responsive to a memory operation that is a load operation on one or more given elements of a memory data structure:
- to determine whether an element in the one or more given elements is of a data type or a combined type;
- to load the element into the data bit data structures of one of the register data structures and to set the mode bit storage data structure to indicate that the one of the register data structures is in the data mode when the element is of the data type;
- and,
- to load the element into the data bit data structures and the metadata bit data structures of one of the register data structures when the element is of the combined type.
5 more elements
Dependencies are inferred from the claim text.