Machine learning-based unravel engine for integrated circuit packaging design

A system comprising:

• a memory device configured to store machine-readable instructions;
• and
• a computing system including one or more processing devices, in response to executing the machine-readable instructions, configured to:
• identify net lines corresponding to connections between pins of a source layout design describing a first electronic device and pins of a target layout design describing a second electronic device;
• scan the net lines in an order selected based, at least in part, on an orientation of the net lines between pins of the source layout design and the pins of the target layout design;
• identify a plurality of the scanned net lines cross each other;
• and
• unravel the crossed net lines by swapping pin assignments of the crossed net lines.

An apparatus including a memory device storing instructions configured to cause one or more processing devices to perform operations comprising:

• identifying net lines corresponding to connections between pins of a source layout design describing a first electronic device and pins of a target layout design describing a second electronic device;
• scanning the net lines in an order selected based, at least in part, on an orientation of the net lines between pins of the source layout design and the pins of the target layout design;
• identifying a plurality of the scanned net lines cross each other;
• and
• unraveling the crossed net lines by swapping pin assignments of the crossed net lines.