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US 2023/0068754 A1Published application
Embedded backside pcram device structure
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorChung-Liang Cheng
Life of this patent
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Abstract
An integrated circuit includes a first chip bonded to a second chip. The first chip includes an array of memory cells. Each memory cell includes a transistor and phase change memory element. The transistor is between the phase change memory element and the second chip.
Claims20
An integrated circuit, comprising:
- a first chip including a memory cell, the memory cell including:
- a transistor;
- a phase change memory element electrically coupled to the transistor;
- a second chip bonded to the first chip, wherein the transistor is positioned between the phase change memory element and the second chip.
1 more element
A method, comprising
- forming a transistor in a first wafer;
- forming a first metal line coupled to the transistor in the first wafer;
- bonding the first wafer to a second wafer;
- forming, in the first wafer, a phase change memory element coupled to the transistor, the transistor positioned between the phase change memory element and the second wafer, wherein the transistor and the phase change memory element are a memory cell;
- and
- forming, in the first wafer, a second metal line coupled to the phase change memory element.
3 more elements
An integrated circuit comprising:
- a first chip including an array of memory cells, each memory cell including:
- a gate all around transistor including:
- a plurality of semiconductor nanosheets;
- a gate electrode surrounding the semiconductor nanosheets;
- a source terminal in contact with the semiconductor nanosheets;
- and
- a drain terminal in contact with the semiconductor nanosheets;
- a phase change memory element coupled to the either the source terminal or the drain terminal;
- and
- a second chip bonded to the first chip.
7 more elements
Dependencies are inferred from the claim text.