Memory device and method for computing-in-memory (cim)
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsHidehiro FUJIWARA, Haruki MORI, Wei-Chang ZHAO
Life of this patent
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AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsHidehiro FUJIWARA, Haruki MORI, Wei-Chang ZHAO
Estimating the term…
A memory device has a memory array including a memory segment to store weight data, a weight buffer coupled to the memory segment and configured to hold new weight data to be updated in the memory segment, a logic circuit, and a computation circuit coupled to an output of the logic circuit. The logic circuit further has a first input coupled to the memory segment by a bit line, and a second input configured to receive input data. The logic circuit is configured to generate, at the output, intermediate data corresponding to the input data and the weight data read from the memory segment through the bit line. The computation circuit is configured to, based on the intermediate data, generate output data corresponding to a computation performed on the input data and the weight data read from the at least one memory segment.
A memory device, comprising:
A method of operating a memory device, the method comprising:
A memory device, comprising:
Dependencies are inferred from the claim text.