Memory sub-system address mapping

An apparatus, comprising:

• a memory sub-system address mapping component configured to:
• access data located in a first address window at a first memory component of a memory sub-system via a first interface;
• access data located in a second address window at a second memory component of the memory sub-system via a second interface;
• and
• access data located in the second address window at the first memory component of the memory sub-system via the first interface.

An apparatus, comprising:

• a memory sub-system address mapping component configured to:
• write data in a first address window to a first memory component of a memory sub-system via a first interface;
• wherein the data remains in the first address window on the first memory component in response to the data being associated with a lower performance attributes than data in a second address window;
• and
• wherein the data is remapped to the second address window in response to the data being associated with a higher performance attributes than data in the first address window.