Integrated circuit and method of forming the same

A semiconductor structure, comprising:

• a first substrate;
• a photodetector, disposed in the first substrate;
• an interconnect structure, disposed on the first substrate, wherein the interconnect structure comprises:
• an interlayer dielectric layer, comprising opposing first sidewalls that at least partially define a first trench overlying the photodetector;
• a lower conductive line, embedded in the interlayer dielectric layer, and disposed between the photodetector and the first trench;
• and
• a barrier layer, disposed between the lower conductive line and the first trench, wherein a portion of a top surface of the barrier layer is exposed by the first trench;
• and
• a first capacitor, disposed within the first trench to contact the portion of the top surface of the barrier layer exposed by the first trench.

A method of forming a semiconductor structure, comprising:

• forming a first dielectric layer on a first substrate;
• forming a conductive line in the first dielectric layer;
• forming a barrier material on the first dielectric layer and the conductive line;
• patterning a barrier material to form a barrier layer on the conductive line;
• forming an etching stop layer to cover the first dielectric layer and a sidewall and a top surface of the barrier layer;
• forming a second dielectric layer on the etching stop layer;
• removing a portion of the second dielectric layer and a portion of the etching stop layer to form a trench in the second dielectric layer and the etching stop layer, wherein the trench exposes a portion of the top surface of the barrier layer;
• and
• forming a capacitor structure within the trench.