Forming dielectric sidewall and bottom dielectric isolation in fork-fet devices

A semiconductor structure comprising:

• a substrate;
• a central vertical pillar of dielectric material protruding upward from the substrate;
• a left plurality of semiconductor fins of a first composition protruding horizontally from a left side of the central vertical pillar above the substrate;
• a right plurality of semiconductor fins of the first composition protruding horizontally from a right side of the central vertical pillar opposite the left plurality of semiconductor fins;
• a second composition of semiconductor material interleaved between the left and right pluralities of semiconductor fins of the first composition;
• left and right semiconductor fins of a third composition protruding horizontally from left and right sides of the central vertical pillar between the substrate and the left and right pluralities of semiconductor fins of the first composition;
• left and right hard masks touching the central vertical pillar above the left and right pluralities of semiconductor fins of the first composition;
• patterning material above and touching the hard mask;
• and
• spacers between and touching the patterning material and the central vertical pillar.

A method comprising:

• forming on a substrate a stack of nanosheets covered by a hard mask, wherein the stack of nanosheets comprise:
• a plurality of semiconductor layers of a first composition;
• a plurality of semiconductor layers of a second composition interleaved between the semiconductor layers of the first composition;
• and
• a semiconductor layer of a third composition between the substrate and the plurality of semiconductor layers of the first composition;
• forming on the hard mask a pair of left and right etch masks separated by a pillar gap;
• narrowing the pillar gap by forming spacers on the etch masks, wherein the spacer partially fill the pillar gap;
• forming a pillar trench between left and right halves of the stack of nanosheets by etching the hard mask and the stack of nanosheet through the pillar gap;
• and
• depositing a central vertical pillar of dielectric material in the pillar trench.