Timing Control Circuit and Timing Control Method Thereof
AssigneeNovatek Microelectronics Corp.
InventorHuan-Teng Cheng
Life of this patent
Estimating the term…
Abstract
A timing control circuit includes a receiving circuit and a line memory coupled to the receiving circuit. The line memory is configured for outputting a first data signal during a first frame period, and outputting a second data signal during a second frame period. An end time point of the first frame period coincides with the start time point of the second frame period. One of the first data signal and the second data signal is corresponding to a long H mode; the other of the first data signal and the second data signal is corresponding to a long V mode.
Claims20
A timing control circuit, comprising:
- a receiving circuit;
- and
- a line memory, coupled to the receiving circuit, wherein the line memory is configured for:
- outputting a first data signal during a first frame period;
- and
- outputting a second data signal during a second frame period,
- wherein an end time point of the first frame period coincides with a start time point of the second frame period,
- wherein one of the first data signal and the second data signal corresponds to a long H mode, and the other of the first data signal and the second data signal corresponds to a long V mode.
A timing control method, comprising:
- outputting a first data signal during a first frame period;
- and
- outputting a second data signal during a second frame period,
- wherein an end time point of the first frame period coincides with a start time point of the second frame period,
- wherein one of the first data signal and the second data signal corresponds to a long H mode, and the other of the first data signal and the second data signal corresponds to a long V mode.
Dependencies are inferred from the claim text.