Gate structures in transistors and method of forming same

A transistor comprising:

• a first nanostructure over a semiconductor substrate;
• a second nanostructure over the first nanostructure;
• a gate dielectric surrounding the first nanostructure and the second nanostructure, wherein the gate dielectric comprises hafnium and fluorine, and wherein a ratio of the fluorine to hafnium in the gate dielectric is in a range of 0.015 and 0.4;
• and
• a gate electrode over the gate dielectric, wherein the gate electrode comprises:
• a first p-type work function material;
• a second p-type work function metal over the first p-type work function material;
• an adhesion layer over the second p-type work function material;
• and
• a fill metal over the adhesion layer, wherein a peak concentration of fluorine is disposed at an interface between the gate dielectric and the first p-type work function material.

A method comprising:

• depositing a gate dielectric around a first nanostructure and a second nanostructure, the first nanostructure is disposed over the second nanostructure;
• performing a fluorine treatment on the gate dielectric;
• depositing a first p-type work function metal over the gate dielectric, the first p-type work function metal disposed around the first nanostructure and the second nanostructure;
• and
• depositing a second p-type work function metal over the first p-type work function metal.