Accounting for steady state noise in bit response superposition based eye diagram simulation

A system for circuit analysis, comprising:

• a memory;
• and
• a processor communicatively coupled to the memory, the processor configured to:
• remove noise from an edge response of a circuit to produce a modified edge response;
• perform superposition of the modified edge response to generate a waveform;
• add the removed noise to the waveform to generate a noised waveform;
• and
• generate, based on the noised waveform, an eye diagram for the circuit.

A non-transitory computer readable medium storing instructions that, when executed by a processor, cause the processor to:

• characterize a steady-state noise in a circuit induced by a power supply for the circuit;
• remove the steady-state noise from an edge response of the circuit to produce a modified edge response;
• generate a waveform by performing superposition of the modified edge response;
• add the steady-state noise to the waveform to generate a noised waveform;
• generate, based on the noised waveform, an eye diagram for the circuit;
• and
• verify an operation of the circuit based on the eye diagram.