Semiconductor arrangement and method of forming
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsChih-Wei Lin, Ming-Hsien Lin, Ming-Hong Hsieh, Jian-Hong Lin
Life of this patent
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Abstract
A semiconductor arrangement includes a heat source above an interconnect layer and below a heat conductor. The heat conductor is coupled to a heat sink by a thermally conductive bonding layer. Heat from the heat source is conducted through the heat conductor in a direction opposite the direction of the interconnect layer, through the thermally conductive bonding layer, and to a heat sink. The heat conductor includes an arrangement of dielectric layers, dummy metal layers, and dummy VIA layers.
Claims20
A semiconductor arrangement, comprising:
- a device layer within a substrate;
- a first metal layer over the device layer;
- a heat source over the first metal layer;
- and
- a first heat conductor over the heat source, wherein the first heat conductor comprises:
- a first dummy metal layer;
- a first dummy vertical interconnect access (VIA) layer over the first dummy metal layer;
- and
- a second dummy metal layer over the first dummy VIA layer.
A method of forming a semiconductor arrangement, comprising:
- forming a device layer in a substrate;
- forming a first metal layer over the device layer;
- forming a second metal layer under the device layer;
- forming a first heat conductor over the first metal layer, wherein forming the first heat conductor comprises:
- forming a first dummy metal layer over the first metal layer;
- forming a first dummy vertical interconnect access (VIA) layer over the first dummy metal layer;
- and
- forming a second dummy metal layer over the first dummy VIA layer.
A semiconductor device, comprising:
- a heat source;
- a bonding layer;
- a first heat conductor overlying the heat source and underlying the bonding layer;
- and
- a heat sink overlying the bonding layer.
Dependencies are inferred from the claim text.