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US 2023/0065852 A1Published application
Semiconductor device with strained channel
AssigneeInternational Business Machines Corporation
InventorsShogo Mochizuki, Nicolas Loubet
Life of this patent
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Abstract
A semiconductor structure includes a p-type field-effect transistor region and an n-type field-effect transistor region. The p-type field-effect transistor region includes a strained channel of a composite of silicon germanium and silicon. The n-type field-effect transistor region includes a silicon channel.
Claims20
A semiconductor structure, comprising:
- a p-type field-effect transistor region, wherein the p-type field-effect transistor region comprises a strained channel comprising a composite of silicon germanium and silicon;
- and
- an n-type field-effect transistor region, wherein the n-type field-effect transistor region comprises a silicon channel.
An integrated circuit, comprising:
- a plurality of semiconductor structures, wherein at least one of the plurality of semiconductor structures comprises:
- a p-type field-effect transistor region, wherein the p-type field-effect transistor region comprises a strained channel comprising a composite of silicon germanium and silicon;
- and
- an n-type field-effect transistor region, wherein the n-type field-effect transistor region comprises a silicon channel.
1 more element
A method for making a semiconductor structure, comprising:
- forming a p-type field-effect transistor region, wherein the p-type field-effect transistor region comprises a strained channel comprising a composite of silicon germanium and silico;
- and
- forming an n-type field-effect transistor region, wherein the n-type field-effect transistor region comprises a silicon channel.
Dependencies are inferred from the claim text.