Wafer-scale direct bonded array core block for an active electronically steerable array (aesa)

An M×N Active Electronically Steerable Array (AESA) for operating frequencies above 50 GHz, comprising:

• a frame;
• one or more printed circuit boards (PCBs) attached to the frame to fan out DC bias and local oscillator (LO) and information signals;
• an array core block positioned in the frame and electrically coupled to the one or more PCBs, said array core block comprising,
• a stack of 2*M alternating N-channel RFIC and MMIC Power Amplifier chips bonded together by a wafer-scale direct bond interconnect process to form M bonded pairs of an M×N element array core block;
• an array of through substrate metal vias that extend vertically through the stack to (a) distribute a DC bias to the MMIC Power Amplifier chips and local oscillator (LO) and information signals to the RFIC chips and (b) connect the N output channels of the RFIC chip to drive corresponding input channels of the MIMIC Power Amplifier chip to drive respective antenna elements integrated on the MIMIC Power Amplifier such that the M×N element array core block forms a steerable RF beam at the operating frequency;
• and
• a cooling system including micro-channels formed on a backside of at least one of the chips in each bonded pair and through substrate via holes formed through the stack that operatively couple the micro-channels for all of the bonded pairs;
• and
• top and bottom manifolds configured to bring fluid to the array core block and circulate the fluid through the micro-channels and through substrate via holes to cool the MC and MMIC Power Amplifier chips and to extract heated fluid from the array core block.

A multi-wafer stack for an Active Electronically Steerable Array (AESA) for operating frequencies above 50 GHz, said stack comprising:

• a stack of 2*M alternating N-channel RFIC and MMIC Power Amplifier wafers bonded together by a wafer-scale direct bond interconnect process, said N-channel RFIC and MMIC Power Amplifier wafers including a plurality of N-channel RFIC chips and N-channel MMIC Power Amplifier chips, respectively, in vertical alignment through the stack to form M bonded pairs of the plurality of M×N element array core blocks;
• each array core block comprising,
• an array of metal thru vias that extend through each array core block to (a) distribute a DC bias to the MMIC Power Amp and local oscillator (LO) and information signals to the RF C and (b) connect the IF modulated and upconverted. LO from each of the N output channels of the RF IC to the input of respective channels of the MIMIC power amp that amplifies the signal to form a steerable RF beam at the operating frequency;
• and
• a cooling system for each array core block, said cooling system including micro-channels formed on the backside of the RF IC and vertical through holes that operatively couple the micro-channels for all of the bonded pairs to receive and circulate a fluid through the stack of micro-channels and vertical through holes to cool the chips and to extract the heated fluid,
• wherein said stack is separable into the plurality of M×N element array core blocks.

A method of fabrication of a plurality of array core blocks for an Active Electronically Steerable Array (AESA) for operating frequencies above 50 GHz, said method comprising:

• fabricating M RFIC wafers from a Silicon based material system at a Silicon foundry;
• fabricating M MMIC Power Amplifier wafers from a III-V based material system at a III-V foundry;
• at an integrating foundry,
• thinning the RFIC and MMIC wafers to specified thicknesses;
• fabricating through substrate metal vias in the RFIC and MIMIC Power Amplifier wafers;
• fabricating micro-channels on the backside of the RFIC wafers;
• fabricating through substrate via holes in the WIC and MMIC Power Amplifier wafers;
• fabricating direct bond dielectric interfaces on both sides of the RFIC and MMIC Power Amplifier wafers;
• performing the wafer-scale direct bond process on alternating MIMIC Power Amplifier and RFIC wafers to form mechanical and hydrogen bonds that seal a multi-wafer stack;
• bumping the multi-wafer stack to provide an interface for attachment to printed circuit boards (PCBs) that are electrically coupled to the through substrate metal vias to distribute a DC bias and local oscillator (LO) and information signals;
• and
• dicing the multi-wafer stack to form a plurality of array core blocks in which a fluid circulates through the micro-channels and through substrate via holes to cool the RFIC and MMIC Power Amplifier.