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US 2023/0065555 A1Published application
Semiconductor Devices and Methods of Manufacture
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsMin-Sung Kuo, I-Kai Hung, Po-Wei Chen, Chung-Cheng Chen
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Abstract
Semiconductor devices and methods of manufacture are provided whereby fences are formed over a substrate and III-V materials are grown over the substrate, wherein the fences block growth of the III-V materials. As such, smaller areas of the III-V materials are grown, thereby preventing stresses that occur with the growth of larger sheets.
Claims20
A method of manufacturing a semiconductor device, the method comprising:
- depositing a fence between a first region of a semiconductor substrate and a second region of the semiconductor substrate;
- growing a III-V material layer on the semiconductor substrate after the depositing the fence;
- removing the fence after the growing the III-V material layer to form a first opening;
- and
- depositing material over the semiconductor substrate, wherein the depositing the material at least partially fills the first opening.
2 more elements
A method of manufacturing a semiconductor device, the method comprising:
- forming a fence between a first die region and a second die region of a semiconductor substrate;
- using the fence as a mask, growing a stack of III-V material layers onto the first die region and the second die region, wherein after the growing the stack of III-V material layers a portion of the III-V material layers has a first sidewall adjacent to the fence;
- removing the fence from a first region to expose sidewalls of the stack of III-V material layers;
- depositing one or more materials into the first region;
- and
- singulating the first die region from the second die region, wherein after the singulating a portion of the one or more materials remains adjacent to the sidewalls of the stack of III-V material layers.
3 more elements
A semiconductor device comprising:
- a semiconductor substrate with a first sidewall;
- a plurality of III-V layers over the semiconductor substrate, the plurality of III-V layers comprising a second sidewall mis-aligned with the first sidewall, a surface of the semiconductor substrate extending between the first sidewall and the second sidewall;
- and
- a sidewall spacer in physical contact with the second sidewall and the surface of the semiconductor substrate, the sidewall spacer being aligned with the first sidewall.
1 more element
Dependencies are inferred from the claim text.