3d flash memory device

A 3D flash memory device, comprising:

• a substrate comprising a memory cell region and a passive device region;
• a conductive layer formed on the substrate, wherein the conductive layer comprises:
• a circuit of a passive device disposed at the passive device region and an etch-stop layer disposed at the memory cell region;
• a 3D flash memory array formed on the etch-stop layer of the memory cell region, wherein the 3D flash memory array comprises:
• a stack structure comprising a plurality of insulating layers and a plurality of gate layers alternately disposed;
• and
• a plurality of pillar structures penetrating the stack structure, each of the pillar structure comprising:
• an insulating pillar;
• a source pillar and a drain pillar located at two sides of the insulating pillar and extended to a surface of the etch-stop layer;
• a channel layer surrounding the source pillar and the drain pillar and in contact with the source pillar and the drain pillar;
• and
• a charge storage layer surrounding the channel layer and in contact with the gate layers of the stack structure;
• and
• a plurality of through-array vias (TAVs) respectively formed on the circuit of the passive device region and connected to at least one end of the circuit.

A 3D NAND flash memory device, comprising:

• a substrate comprising a memory cell region and a passive device region;
• a conductive layer formed on the substrate, wherein the conductive layer comprises:
• a circuit of a passive device disposed at the passive device region and a source line disposed at the memory cell region;
• a 3D NAND flash memory array formed on the source line of the memory cell region;
• and
• a plurality of through-array vias (TAVs) respectively formed on the circuit of the passive device region and connected to at least one end of the circuit.