Accelerators for factorized power systems
AssigneeVicor Corporation
InventorPatrizio Vinciarelli
Life of this patent
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Abstract
The system response time of a factorized power architecture may be reduced using a high bandwidth accelerator connected in parallel with a low bandwidth switching regulator to feed one or more downstream high bandwidth current multipliers, e.g. at the point of load. The accelerator may use a high speed linear amplifier to drive the factorized bus using stored energy derived from the bus or a low voltage bias supply. The accelerator may alternatively be connected in series between the switching regulator and the downstream current multipliers.
Claims75
A method of providing power to a load, the method comprising:
- providing a switching regulator having a regulator input connected to receive power from a source and a regulator output for delivering a controlled voltage, Vf, to a factorized bus, the switching regulator having a regulator response time, Treg;
- providing a current multiplier stage having switching power conversion circuitry constructed and arranged to convert power received from the factorized bus via an input at an input voltage, Vin, for delivery to a load via an output at an output voltage, Vout, using a voltage transformation ratio, K=Vout/Vin, that is essentially constant, subject to an equivalent output resistance, the current multiplier having a multiplier response time, Tm;
- providing an accelerator circuit having an output connected to supply current to the factorized bus, the accelerator having an error input connected to detect perturbances in the output voltage, Vout, the accelerator responsively supplying current to the factorized bus, the accelerator having an accelerator response time, Tacc;
- wherein the accelerator response time, Tacc, is shorter than the regulator response time, Treg.
A method of providing power to a load comprising:
- providing a first power conversion stage having an input for receiving power from a source and an output for supplying regulated power at an output voltage, V1, the first power conversion stage having a response time, Treg;
- providing a second power conversion stage having switching power conversion circuitry constructed and arranged to convert power received from an input at an input voltage, Vin, for delivery to a load via an output at an output voltage, Vout, using a voltage transformation ratio, K=Vout/Vin, that is essentially constant, subject to an equivalent output resistance, the current multiplier having a multiplier response time, Tm;
- providing an accelerator circuit having a sense input connected to detect a perturbance in the output voltage, Vout, of the current multiplier, a high-bandwidth amplifier having an input connected to the sense input, and an accelerator output connected to supply transient power in response to a perturbance;
- connecting the input of the current multiplier to receive power from a factorized bus, at a factorized voltage, VF;
- connecting the accelerator output to supply transient power to the factorized bus;
- and
- using the accelerator to supply transient power to the factorized bus in response to the perturbance in the output voltage, Vout, of the current multiplier, within an accelerator response time, Tacc, measured from a leading edge of the perturbance to a leading edge of the transient power;
- wherein the accelerator response time, Tacc, is less than the multiplier response time, Tm, and less than half of the regulator response time, Treg.
A factorized power supply apparatus comprising:
- a switching regulator having a regulator input connected to receive power from a source and a regulator output for delivering a controlled voltage, Vf, to a factorized bus, the switching regulator having a regulator response time, Treg;
- a current multiplier stage having switching power conversion circuitry constructed and arranged to convert power received from the factorized bus via an input at an input voltage, Vin, for delivery to a load via an output at an output voltage, Vout, using a voltage transformation ratio, K=Vout/Vin, that is essentially constant, subject to an equivalent output resistance, the current multiplier having a multiplier response time, Tm;
- an accelerator circuit having an output connected to supply current to the factorized bus, the accelerator having an error input connected to detect perturbances in the output voltage, Vout, the accelerator responsively supplying current to the factorized bus, the accelerator having an accelerator response time, Tacc;
- wherein the accelerator response time, Tacc, is shorter than the regulator response time, Treg.
A factorized power supply apparatus comprising:
- a factorized power bus including a regulator and a current multiplier, the current multiplier configured to receive power from the factorized bus and provide output power to an electronic device, the regulator including a response time of T1;
- and
- a high bandwidth regulator configured to operate on the factorized power bus to cause a change in a demand for current to be met by the current multiplier by detecting the change in the demand for current and providing current to the factorized power bus, the high bandwidth regulator including a response time of T2;
- wherein the response time T2 is at least two times faster than the response time of T1.
Dependencies are inferred from the claim text.