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US 2023/0057342 A1Published application
Semiconductor package and method of manufacturing the same
AssigneeSamsung Electronics Co., Ltd.
InventorsEUNSEOK SONG, Kyungsuk Oh, Seho You
Life of this patent
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Abstract
A semiconductor package includes a package substrate, a logic chip stacked on the package substrate and including at least one logic element, and a stack structure. The stack structure includes an integrated voltage regulator (IVR) chip including a voltage regulating circuit that regulates a voltage of the at least one logic element, and a passive element chip stacked on the IVR chip and including an inductor.
Claims20
A semiconductor package, comprising:
- a package substrate;
- a logic chip stacked on the package substrate and comprising at least one logic element;
- and
- a stack structure comprising an integrated voltage regulator (IVR) chip and a passive element chip stacked on the IVR chip,
- wherein the stack structure is disposed on the package substrate adjacent to the logic chip.
2 more elements
A semiconductor package, comprising:
- a package substrate;
- a logic chip stacked on the package substrate and comprising at least one logic element;
- and
- a stack structure stacked on the package substrate adjacent to the logic chip,
- wherein the stack structure comprises:
- an integrated voltage regulator (IVR) chip comprising a voltage regulating circuit that regulates a voltage of the at least one logic element;
- and
- a passive element chip stacked on the IVR chip and comprising an inductor,
- wherein the passive element chip is stacked on the IVR chip in a front-to-front bonding form.
6 more elements
A semiconductor package, comprising:
- a package substrate;
- a logic chip mounted on the package substrate and comprising at least one logic element;
- an integrated voltage regulator (IVR) chip stacked on the package substrate adjacent to the logic chip and comprising a voltage regulating circuit that adjusts a voltage of the at least one logic element;
- and
- a passive element chip stacked on the IVR chip and comprising an inductor,
- wherein the passive element chip is stacked on the IVR chip in a front-to-front bonding form in which an active surface of the passive element chip and an active surface of the IVR chip face each other,
- wherein a pitch between pads of the passive element chip or the IVR chip is about 10 um or less.
4 more elements
Dependencies are inferred from the claim text.