Hot page detection by sampling tlb residency
AssigneeIntel Corporation
InventorAndy Rudoff
Life of this patent
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AssigneeIntel Corporation
InventorAndy Rudoff
Estimating the term…
The disclosed technology provides for an improved memory tiering arrangement. In one aspect, an apparatus includes a sampling register and logic, responsive to sequential read requests, to read page data entries stored in successive locations in a TLB and provide page data from the page data entries as sequential outputs of the sampling register. In another aspect, a method includes generating a page residency list based on scanning, via a sampling register, page data entries stored in successive locations in a TLB, determining, for each page, whether the respective page is a hot page or a cold page based on the page residency list, and assigning hot pages to a first memory tier and cold pages to a second memory tier. Scanning page data entries stored in the TLB can include issuing a sequence of read requests to the sampling register sufficient to read all entries in the TLB.
A semiconductor apparatus comprising:
A computing system comprising:
A method comprising:
Dependencies are inferred from the claim text.