Epitaxial wafer, semiconductor device, and method for manufacturing epitaxial wafer

An epitaxial wafer comprising:

• a substrate;
• a buffer layer formed of a crystal having a composition formula represented by AlxGayInzN (x+y+z=1, y>0) on the substrate;
• a back-barrier layer formed of a crystal having a composition formula represented by AlxGayInzN (x+y+z=1, y>0, z>0) on the buffer layer;
• a channel layer formed of a crystal having a composition formula represented by AlxGayInzN (x+y+z=1, y>0) on the back-barrier layer;
• and
• an electron-supply layer formed of a crystal having a composition formula represented by AlxGayInzN (x+y+z=1, x>0) on the channel layer,
• wherein the channel layer is constituted with an upper channel layer underneath the electron-supply layer and a lower channel layer on the back-barrier layer,
• the lower channel layer has a C concentration higher than the upper channel layer and contains Si, and an Si concentration in the lower channel layer is higher than the C concentration in the lower channel layer.

An epitaxial wafer comprising:

• a substrate;
• a buffer layer formed of a crystal having a composition formula represented by AlxGayInzN (x+y+z=1, y>0) on the substrate;
• a back-barrier layer formed of a crystal having a composition formula represented by AlxGayInzN (x+y+z=1, y>0, z>0) on the buffer layer;
• a channel layer formed of a crystal having a composition formula represented by AlxGayInzN (x+y+z=1, y>0) on the back-barrier layer;
• and
• an electron-supply layer formed of a crystal having a composition formula represented by AlxGayInzN (x+y+z=1, x>0) on the channel layer,
• wherein the channel layer is constituted with an upper channel layer underneath the electron-supply layer and a lower channel layer on the back-barrier layer, the lower channel layer has a C concentration higher than the upper channel layer and contains Si, and the back-barrier layer contains Si and C, and an Si concentration in the back-barrier layer is higher than a C concentration in the back-barrier layer.

An epitaxial wafer manufacturing method comprising:

• a placing step of placing a substrate in a furnace;
• a buffer layer forming step of growing on the substrate a buffer layer formed of a crystal having a composition formula represented by AlxGayInzN (x+y+z=1, y>0);
• a back-barrier layer forming step of growing on the buffer layer a back-barrier layer formed of a crystal having a composition formula represented by AlxGayInzN (x+y+z=1, y>0, z>0);
• a channel layer forming step of growing on the back-barrier layer a channel layer formed of a crystal having a composition formula represented by AlxGayInzN (x+y+z=1, y>0);
• and
• an electron-supply layer forming step of growing on the channel layer an electron-supply layer formed of a crystal having a composition formula represented by AlxGayInzN (x+y+z=1, x>0),
• wherein in the channel layer forming step, a temperature in the furnace when forming on the back-barrier layer a lower channel layer of the channel layer is set lower than a temperature in the furnace when forming underneath the electron-supply layer an upper channel layer of the channel layer, and
• wherein in the channel layer forming step, the lower channel layer is doped with Si so that an Si concentration in the lower channel layer is higher than a C concentration in the lower channel layer when forming the lower channel layer.