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US 2023/0054514 A1Published application
Apparatus including integrated segments and methods of manufacturing the same
AssigneeMicron Technology, Inc.
InventorsWei Zhou, Chien Wen Huang
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Abstract
Semiconductor devices including one or more interfacing segments patterned within an outer protective layer and associated systems and methods are disclosed herein. The one or more interfacing segments may provide attachment interfaces/surfaces for connection pads. The one or more interfacing segments or a portion thereof may remain uncovered or exposed and provide warpage control for the corresponding semiconductor device.
Claims20
An apparatus, comprising:
- a semiconductor substrate;
- a passivation layer over a surface of the semiconductor substrate;
- and
- an interfacing segment patterned within the passivation layer, wherein
- the interfacing segment includes electrical isolative material,
- the interfacing segment and the passivation layer include different material, and
- the interfacing segment and the passivation layer are coplanar with each other.
4 more elements
A semiconductor device, comprising:
- a wafer-level substrate;
- active circuitry formed on the wafer-level substrate;
- a passivation layer over a surface of the wafer-level substrate;
- and
- an interfacing segment embedded within the passivation layer, wherein
- the interfacing segment includes electrical isolative material,
- the interfacing segment and the passivation layer include different material, and
- the interfacing segment and the passivation layer are coplanar with each other;
- an electrical pad physically coupled to the semiconductor substrate and electrically coupled to the active circuitry, wherein the electrical pad is configured to provide an external electrical interface for the active circuitry in the semiconductor device;
- and
- a thermal pad physically coupled to the interfacing segment and electrically isolated from the active circuitry, wherein the thermal pad is configured to provide an external thermal interface for removing thermal energy from the semiconductor device.
8 more elements
A method of manufacturing a semiconductor device, the method comprising:
- providing a semiconductor substrate having active circuitry thereon;
- forming an interfacing structure over the semiconductor substrate;
- forming one or more interfacing segments based on removing portions of the interfacing structure;
- forming a passivation layer over the semiconductor substrate and surrounding the one or more interfacing segments;
- and
- planarizing the passivation layer and the interfacing segments, wherein the planarized passivation layer and the interfacing segments have coplanar outer surfaces.
3 more elements
Dependencies are inferred from the claim text.