Semiconductor device and data storage system including the same

A semiconductor device, comprising:

• a conductive plate layer;
• a stack structure including interlayer insulating layers and gate electrodes alternately stacked on the conductive plate layer;
• a separation structure penetrating through the stack structure in a vertical direction and extending in a first direction, perpendicular to the vertical direction, to separate the gate electrodes in a second direction, perpendicular to the first direction;
• and
• a plurality of vertical structures penetrating through the stack structure in the vertical direction and arranged at a constant pitch in at least one direction, parallel to an upper surface of the conductive plate layer, wherein:
• the plurality of vertical structures are arranged along array lines extending in the first direction and sequentially arranged in the second direction away from at least one side of the separation structure in a plan view,
• the plurality of vertical structures include a channel structure including a channel layer, a contact structure including a metal plug having an upper surface on a level higher than a level of an upper surface of the channel structure, and a dummy structure disposed adjacent to the contact structure, and
• the channel structure, the dummy structure, and the contact structure are disposed to be aligned with each other on at least one of the array lines.

A data storage system, comprising:

• a lower structure including a substrate, circuit elements on the substrate, and a lower wiring structure electrically connected to the circuit elements;
• an upper structure on the lower structure;
• a semiconductor storage device including an input/output pad electrically connected to the circuit elements;
• and
• a controller electrically connected to the semiconductor storage device through the input/output pad and controlling the semiconductor storage device, wherein:
• the upper structure includes:
• a conductive plate layer on the lower structure;
• a stack structure including interlayer insulating layers and gate electrodes alternately stacked on the conductive plate layer;
• a separation structure penetrating through the stack structure in a vertical direction and extending in a first direction, perpendicular to the vertical direction, to separate the gate electrodes in a second direction, perpendicular to the first direction;
• and
• a plurality of vertical structures penetrating through the stack structure in the vertical direction and arranged at a constant pitch in at least one direction, parallel to an upper surface of the conductive plate layer,
• the plurality of vertical structures are arranged along array lines extending in the first direction and sequentially arranged in the second direction away from at least one side of the separation structure on a plane parallel to the upper surface of the conductive plate layer,
• the plurality of vertical structures include a channel structure including a channel layer, a contact structure having an upper surface on a level higher than a level of an upper surface of the channel structure and including a metal plug, and
• a dummy structure disposed adjacent to the contact structure, and the channel structure, the dummy structure, and the contact structure are disposed to be aligned with each other on at least one of the array lines.