Digital low-dropout voltage regulator

An integrated circuit device, comprising:

• an active semiconductor layer defining a plurality of functional units, including a at least one digital low-dropout voltage regulator (DLVR) cell comprising a DLVR circuit having a voltage supply input and an output;
• a first layer of conductive lines disposed above the DLVR circuit, a first one of the conductive lines being connected to the voltage supply input, and a second one of the conductive lines being connected to the output;
• and
• a plurality of layers of conductive lines above the first layer of conductive lines;
• and
• a plurality of conductive pillars, each interconnecting one of the conductive lines in one of the plurality of layers of conductive lines with one of the conductive lines in another one of the plurality of layer of conductive lines or the first layer of conductive lines.

A method of making an integrated circuit device, the method comprising:

• forming an active semiconductor region within a row of functional cells as a part of an integrated circuit device, the functional cells having a common cell height;
• forming a first and second transistors in the active semiconductor region, the first and second transistors being arranged in a cascode configuration, each of the transistors having a gate, source, and drain, the drain of the first transistor being connected to the source of the second transistor;
• and
• forming a first layer of conductive lines above the active semiconductor region, a first one of the conductive lines being connected to the gate of the first transistor, a second one of the conductive lines being connected to the gate of the second transistor, a third one of the conductive lines being connected to the source of the first transistor, and a fourth one of the conductive lines being connected to the drain of the second transistor, the first, second, third, and fourth conductive lines being disposed within the cell height.