Semiconductor device structure and method for forming the same

A semiconductor device structure, comprising:

• an isolation structure formed over a substrate;
• a first stacked nanostructure and a second stacked nanostructure extending above the isolation structure;
• a dummy fin structure formed over the isolation structure, wherein the dummy fin structure is between the first stacked nanostructure and the second stacked nano structure;
• and
• a capping layer formed over the dummy fin structure;
• and
• a gate structure formed over the first stacked nanostructure and the second stacked nanostructure;
• and
• a gate spacer layer formed adjacent to the gate structure, wherein a sidewall of the capping layer is aligned with a sidewall of the gate spacer layer.

A method for forming a semiconductor device structure, comprising:

• forming a first stacked nanostructure and a second stacked nanostructure extending above a substrate, wherein each of the first stacked nanostructure and the second stacked nanostructure comprises a plurality of first semiconductor layers and a plurality of second semiconductor layers;
• forming a plurality of dummy fin structures over the isolation structure, wherein the dummy fin structures are between the first stacked nanostructure and the second stacked nano structure;
• forming a plurality of capping layer over the corresponding dummy fin structures;
• removing a portion of the capping layers to expose a top surface of the dummy fin structure, such that a number of the capping layers is smaller than a number of the dummy fin structures;
• removing the first semiconductor layers to form a gap between two adjacent second semiconductor layers;
• forming a gate structure in the gap and over the exposed dummy fin structure;
• and
• removing a portion of the gate structure, wherein a top surface of the gate structure is higher than a top surface of the exposed dummy fin structure and lower than a top surface of the capping layer.