Technologies for aligned vias over multiple layers
AssigneeIntel Corporation
InventorsChanghua Liu, Leonel R. Arana, Jeremy D. Ecton, Suddhasattwa Nad, Brandon Christian Marin
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AssigneeIntel Corporation
InventorsChanghua Liu, Leonel R. Arana, Jeremy D. Ecton, Suddhasattwa Nad, Brandon Christian Marin
Estimating the term…
Techniques for low- or zero-misaligned vias are disclosed. In one embodiment, a high-photosensitivity, medium-photosensitivity, and low-photosensitivity layer are applied to a substrate and exposed at the same time with use of a multi-tone mask. After being developed, one layer forms a mold for a first via, one layer forms a mold for a conductive trace and a second via, and one layer forms an overhang over the position for the second via. The molds formed by the photosensitive layers are filled with copper and then etched. The overhang prevents the top of the copper infill below the overhang region from being etched. As such, the region under the overhang forms a pillar or column after etching, which can be used as a via. Other embodiments are disclosed.
A method comprising:
An apparatus comprising:
Dependencies are inferred from the claim text.