Hardware queue scheduling for multi-core computing environments

An apparatus for hardware queue scheduling in a multi-core computing environment, the apparatus comprising:

• means for enqueuing an identifier to a queue implemented with circuitry in a die of a processor, the identifier associated with a data packet;
• means for assigning the identifier in the queue to a first core of the processor;
• and
• means for allocating the identifier to a second core to cause the second core to distribute the data packet in response to an execution of an operation on the data packet with the first core, at least one of the first core or the second core are included in the die of the processor, the at least one of the first core or the second core separate from the circuitry.

An apparatus for dynamic load balancing in a multi-core computing environment, the apparatus comprising:

• a first core and a plurality of second cores of a processor;
• and
• circuitry in a die of the processor, the circuitry separate from the first core and the second cores, the circuitry to:
• enqueue identifiers in one or more queues in the circuitry, the identifiers associated with respective ones of data packets of a packet flow;
• allocate one or more of the second cores to dequeue first ones of the identifiers in response to a throughput parameter of the first core not satisfying a throughput threshold to cause the one or more of the second cores to execute one or more operations on first ones of the data packets, the first ones of the data packets corresponding to the dequeued first ones of the identifiers;
• and
• provide the first ones of the identifiers to one or more data consumers of the processor to distribute the first ones of the data packets.

An apparatus for dynamic load balancing in a multi-core computing environment, the apparatus comprising:

• a first core and a second core of a processor;
• and
• circuitry in a die of the processor, the circuitry to:
• enqueue an identifier in a queue in the circuitry, the identifier associated with a data packet of a packet flow;
• dequeue the identifier to the first core to cause the first core to execute a first operation on the data packet;
• enqueue the identifier in the queue in response to obtaining an indication of completion of the first operation;
• dequeue the identifier to the first core or the second core to cause the first core or the second core to execute a second operation on the data packet different from the first operation;
• and
• provide the identifier to a data consumer of the processor to distribute the data packet.