Semiconductor Device and Method
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsChia-Ling Chan, Meng-Yueh Liu, Wei-Ken Lin
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Abstract
In accordance with some embodiments, a method is provided. The method includes: forming a semiconductor fin protruding from a substrate; depositing a spacer layer over the semiconductor fin; after the depositing the spacer layer over the semiconductor fin, implanting a first dopant in the spacer layer and depositing a dopant layer of the first dopant on the spacer layer in alternating repeating steps; removing the dopant layer; and performing a thermal anneal process to drive the first dopant into the semiconductor fin from the spacer layer.
Claims20
A method comprising:
- forming a first gate stack on a first semiconductor fin and a second gate stack on a second semiconductor fin, the first semiconductor fin and the second semiconductor fin protruding above an isolation region;
- depositing a spacer layer on the first gate stack, the second gate stack, the first semiconductor fin, the second semiconductor fin, and the isolation region;
- forming a mask on the spacer layer, the mask covering the second semiconductor fin, the first semiconductor fin uncovered by the mask;
- implanting a first dopant having a first doping type in the spacer layer over the first semiconductor fin while the mask shields the spacer layer over the second semiconductor fin;
- performing an anneal process to drive the first dopant from the spacer layer into the first semiconductor fin and the isolation region;
- and
- after performing the anneal process, patterning the spacer layer to form a first gate spacer and a second gate spacer, the first gate spacer extending along a sidewall of the first gate stack, the second gate spacer extending along a sidewall of the second gate stack.
A method comprising:
- depositing a dielectric layer on a semiconductor fin and an isolation region, the semiconductor fin protruding above the isolation region;
- performing a plasma doping process comprising:
- depositing a layer of a first dopant on the dielectric layer during a discharge pulse of the plasma doping process;
- and
- implanting particles of the first dopant into the dielectric layer during an implant pulse of the plasma doping process;
- removing the layer of the first dopant with an etch process, wherein the etch process does not remove the particles of the first dopant implanted into the dielectric layer;
- and
- performing a thermal anneal process to drive the particles of the first dopant from the dielectric layer into the semiconductor fin and the isolation region.
A method comprising:
- forming a gate stack on a semiconductor fin, the semiconductor fin protruding above an isolation region;
- depositing an insulating layer on the gate stack, the semiconductor fin, and the isolation region;
- implanting a dopant having a first doping type in the insulating layer;
- forming a lightly doped drain/source region in the semiconductor fin by driving the dopant from the insulating layer into the semiconductor fin and the isolation region;
- after forming the lightly doped drain/source region, patterning the insulating layer to form a gate spacer on a sidewall of the gate stack;
- and
- forming a source/drain region in the lightly doped drain/source region, the source/drain region having the first doping type.
Dependencies are inferred from the claim text.