Semiconductor device and method for manufacturing the same

A method for manufacturing a semiconductor device comprising:

• forming, in a substrate, a first active region and a second active region separated from each other and in which a semiconductor layer is activated, and an inactive region provided between the first active region and the second active region and in which the semiconductor layer is deactivated;
• forming, on the first active region, a first source ohmic layer and a first drain ohmic layer provided adjacent to the first source ohmic layer in a width direction of the first source ohmic layer and along the first source ohmic layer;
• forming, on the second active region, a second source ohmic layer having a width smaller than the width of the first source ohmic layer and extending in an extension direction in which the first source ohmic layer extends, the width of the second source ohmic layer in a width direction being within the width of the first source ohmic layer, and a second drain ohmic layer provided adjacent to the second source ohmic layer in a width direction of the second source ohmic layer and along the second source ohmic layer;
• forming, on the first active region, a first gate finger sandwiched between the first source ohmic layer and the first drain ohmic layer and provided adjacent to the first source ohmic layer in the width direction of the first source ohmic layer and along the first source ohmic layer;
• forming, on the second active region, a second gate finger sandwiched between the second source ohmic layer and the second drain ohmic layer and provided adjacent to the second source ohmic layer in the width direction of the second source ohmic layer, on a region of the substrate located in the extension direction from the first gate finger, and along the second source ohmic layer;
• forming, on the substrate, a first gate wiring sandwiching the second source ohmic layer between the second gate finger and the first gate wiring, the width of the first gate wiring in the width direction being within the width of the first source ohmic layer;
• and
• forming, on the inactive region, a second gate wiring connecting the first gate finger to the first gate wiring.