Superjunction semiconductor device having floating region and method of manufacturing same
AssigneeDB HiTek Co., Ltd.
InventorsMyeong Bum PYUN, Won Kook CHO
Life of this patent
Estimating the term…
Abstract
Disclosed are a superjunction semiconductor device having a floating region and a method of manufacturing the same. More particularly, a superjunction semiconductor device having a floating region and a method of manufacturing the same are disclosed, in which a floating region including first conductivity type impurities is between adjacent pillars in a ring region, so that an electric field can easily expand in the ring region under an N-rich condition, thereby improving breakdown voltage (BV) characteristics and ensuring device stability.
Claims20
A superjunction semiconductor device, comprising:
- a substrate;
- first and second epitaxial layers on the substrate, the first epitaxial layer in a cell region and the second epitaxial layer in a ring region;
- a plurality of pillars spaced apart from each other in a transverse direction in the first epitaxial layer and the second epitaxial layer;
- a body region on each of the pillars in the first epitaxial layer;
- a source in the body region;
- a gate electrode on the first epitaxial layer;
- and
- a floating region in the second epitaxial layer between adjacent pillars in the ring region.
A superjunction semiconductor device, comprising:
- a substrate;
- a second conductivity type epitaxial layer on the substrate, including a first epitaxial layer in a cell region and a second epitaxial layer in a ring region;
- a plurality of first conductivity type pillars alternating with portions of the epitaxial layer, spaced apart from each other in a transverse direction in the first epitaxial layer and the second epitaxial layer;
- a first conductivity type body region on each of the pillars in the first epitaxial layer;
- a second conductivity type source in the body region;
- a gate electrode on the first epitaxial layer;
- and
- a floating region in the second epitaxial layer between adjacent pillars in the ring region,
- wherein the floating region has an uppermost surface substantially flush with uppermost surfaces of the adjacent pillars and a vertical thickness or height equal to or less than half of that of the adjacent pillars.
The superjunction semiconductor device of claim 89, wherein the floating region is in a ring Y region or a ring corner region.
A method of manufacturing a superjunction semiconductor device, the method comprising:
- forming a first epitaxial layer and a second epitaxial layer on a substrate;
- forming a plurality of pillars in the epitaxial layer, spaced apart from each other in a transverse direction;
- forming a gate oxide layer on the first epitaxial layer;
- forming a gate electrode on the gate oxide layer;
- and
- forming a floating region between adjacent pillars in the second epitaxial layer.
A method of manufacturing a superjunction semiconductor device, the method comprising:
- forming a second conductivity type epitaxial layer including a first epitaxial layer and a second epitaxial layer on a substrate;
- forming a plurality of first conductivity type pillars in the epitaxial layer, spaced apart from each other in a transverse direction;
- forming a gate oxide layer on the first epitaxial layer;
- forming a gate electrode on the gate oxide layer;
- and
- forming a first conductivity type floating region between adjacent pillars in the second epitaxial layer,
- wherein the floating region is adjacent to a cell region and has a dose ratio of P-type to N-type impurities equal to or less than 1.
Dependencies are inferred from the claim text.