Semiconductor super-junction power device

A semiconductor super junction power device, comprising:

• an n-type drain region, an n-type drift region located above the n-type drain region and a super junction MOSFET cell array composed of a plurality of super junction MOSFET cells, wherein each super junction MOSFET cell of the plurality of super junction MOSFET cells comprises:
• a p-type body region, located at a top of the n-type drift region;
• a p-type columnar doping region, located below the p-type body region;
• an n-type source region, located in the p-type body region;
• a gate structure located above the p-type body region, wherein the gate structure comprises a gate dielectric layer, a gate electrode and an n-type floating gate, the gate electrode and the n-type floating gate are located above the gate dielectric layer, and in a lateral direction, the gate electrode is located on a side close to the n-type source region, the n-type floating gate is located on a side close to the n-type drift region, and the gate electrode is configured to act on the n-type floating gate through capacitive coupling;
• and
• an opening located in the gate dielectric layer, wherein the n-type floating gate contacts the p-type body region through the opening to form a p-n junction diode.