Insulated gate semiconductor device

An insulated gate semiconductor device comprising:

• a drift layer of a first conductivity-type;
• a high-concentration layer of the first conductivity-type provided on a top surface of the drift layer;
• a buried layer of a second conductivity-type provided inside the high-concentration layer;
• an injection regulation region of the second conductivity-type provided on top surfaces of the high-concentration layer and the buried layer;
• a high-concentration region of the second conductivity-type provided inside the injection regulation region and having an impurity concentration higher than an impurity concentration of the injection regulation region;
• a carrier supply region of the first conductivity-type selectively provided at an upper part of the injection regulation region;
• a trench penetrating the injection regulation region to reach the high-concentration layer;
• and
• an insulated gate structure provided inside the trench,
• wherein a ratio of the impurity concentration of the injection regulation region to an impurity concentration of the high-concentration layer at least at a part in contact with the injection regulation region is 0.5 or greater and 2 or smaller.