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AssigneesChengdu Boe Optoelectronics Technology Co., Ltd., Boe Technology Group Co., Ltd.
InventorsTinghua SHANG, Yang ZHOU, Pengfei YU, Zhengwei LUO
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A display panel includes a substrate, and a plurality of pixel units arranged on the substrate in an array form and each including a plurality of subpixels. Each subpixel includes a subpixel driving circuitry, a planarization layer and an anode pattern laminated one on another, each anode pattern of at least a part of the subpixels includes a middle portion and a peripheral portion surrounding the middle portion, a groove is formed in a surface of the planarization layer away from the substrate, an orthogonal projection of the groove onto the substrate surrounds an orthogonal projection of the middle portion onto the substrate, and at least a part of an orthogonal projection of the peripheral portion onto the substrate is located within the orthogonal projection of the groove onto the substrate.
A display panel, comprising a substrate, and a plurality of pixel units arranged on the substrate in an array form and each comprising a plurality of subpixels, wherein each subpixel comprises a subpixel driving circuitry, a planarization layer and an anode pattern laminated one on another, each anode pattern of at least a part of the subpixels comprises a middle portion and a peripheral portion surrounding the middle portion, a groove is formed in a surface of the planarization layer away from the substrate, an orthogonal projection of the groove onto the substrate surrounds an orthogonal projection of the middle portion onto the substrate, and at least a part of an orthogonal projection of the peripheral portion onto the substrate is located within the orthogonal projection of the groove onto the substrate.
A method for manufacturing a display panel, comprising forming a plurality of pixel units on a substrate, the plurality of pixel units being arranged in an array form, each pixel unit comprising a plurality of subpixels, wherein each subpixel comprises a subpixel driving circuitry, a planarization layer and an anode pattern laminated one on another in a direction away from the substrate, each anode pattern of at least a part of the subpixels comprises a middle portion and a peripheral portion surrounding the middle portion, a groove is formed in a surface of the planarization layer away from the substrate, an orthogonal projection of the groove onto the substrate surrounds an orthogonal projection of the middle portion onto the substrate, and at least a part of an orthogonal projection of the peripheral portion onto the substrate is located within the orthogonal projection of the groove onto the substrate.
Dependencies are inferred from the claim text.