Semiconductor storage device

A memory die, comprising:

• a substrate;
• a plurality of memory cell arrays above the substrate and each memory cell array including:
• a plurality of first conductive layers stacked in a first direction intersecting the substrate, the first conductive layers each extending in a second direction parallel to the substrate,
• a semiconductor layer extending in the first direction through the plurality of first conductive layers and facing each of first conductive layers in the second direction, and
• a gate insulating film between the semiconductor layer and the plurality of first conductive layers and;
• and
• a peripheral circuit on the substrate and including a first resistance element extending in the first direction, wherein
• one end of the first resistance element in the first direction is closer to the substrate than at least a part of the plurality of first conductive layers, and
• the other end of the first resistance element in the first direction is farther from the substrate than the plurality of first conductive layers.

A method of manufacturing a semiconductor device, comprising:

• forming a plurality of first conductive layers above a first region of a substrate along a first direction intersecting the substrate so as to extend along a second direction parallel to the substrate;
• forming a first insulating layer on a second region of the substrate;
• forming a first hole penetrating the first conductive layers and reaching the substrate;
• forming a second hole penetrating the first insulating layer and reaching the substrate;
• forming a plurality of second conductive layers above the plurality of first conductive layers along the first direction so as to extend along the second direction;
• forming a second insulating layer on the first insulating layer;
• forming a third hole penetrating the second conductive layers and connected to the first hole;
• forming a gate insulating film and a semiconductor layer in the first and third holes;
• forming a fourth hole penetrating the second insulating layers and connected to the second hole;
• and
• forming a first resistance element in the second and fourth holes.