Three-dimensional memory device and method

A device comprising:

• a source line extending in a first direction;
• a bit line extending in the first direction;
• a gate stack between the source line and the bit line, the gate stack extending in the first direction;
• a word line extending in a second direction, the second direction being perpendicular to the first direction;
• a memory film extending along the word line;
• and
• a channel layer between the source line and the memory film, between the gate stack and the memory film, and between the bit line and the memory film.

A device comprising:

• a semiconductor substrate;
• a first memory cell over the semiconductor substrate, the first memory cell comprising a first transistor, wherein the first transistor comprises:
• a first gate electrode provided by a portion of a first word line;
• a first portion of a ferroelectric material, the first portion of the ferroelectric material being on a sidewall of the first word line;
• a first channel region on a sidewall of the ferroelectric material;
• and
• a second gate electrode on a sidewall of the first channel region opposite the ferroelectric material;
• a first source/drain electrode provided by a first portion of a source line;
• and
• a second source/drain electrode provided by a first portion of a bit line, wherein the second gate electrode separates the first source/drain electrode and the second source/drain electrode;
• and
• a second memory cell over the first memory cell.